Trainer Name: Dr. Debdeep Mukhopadhyay , Dr. Shivam Bhasin , Urbi Chatterjee , Sayandeep Saha

Title: Cryptography and Hardware Security in Cyber Physical Systems

Duration: 4 days (4 hrs each day)

Dates: May 10, 2022 To May 13, 2022

Time: 10 a.m. To 2 p.m. IST

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Training Objective

Cyber Physical Systems (CPS) is a close association between computational and communication blocks (referred to as “cyber”) and components for sensing real data and actuating thereof (referred to as “physical”). While CPS is a tremendous enabler to improved quality of living conditions around the world, the combination of physical systems with the cyber world pose threats which, if not catered, can lead to catastrophic consequences. The subsystems involved in the CPS are at a larger exposure with an adversary increasing the feasibility of physical attacks which can jeopardize security. The extreme longevity of CPS also necessitates the ability of the CPS components for enduring new attacks which are constantly being surfaced. What makes security in CPS all the more challenging is that these threats and security challenges are often to be mitigated in extremely constrained environments due to factors low-cost and low-energy specifications.

In this course, we shall take a holistic look at security, starting from theoretical foundations of Cryptography to Advanced Topics of Hardware Security to learn how the ciphering algorithms are realized on actual hard- ware. The course shall discuss on fundamental blocks like Symmetric Key Encryptions and Asymmetric Key Encryptions, along with discussions on attacks (cryptanalysis) of these techniques. The course shall then discuss lightweight hardware implementations of such ciphers, targeting FPGA based solutions as a popular design platform. The course then discusses several hardware attacks, called side-channel-attacks, which are based on monitor- ing the power/electromagnetic radiations from the enciphering hardware. As CPS devices have to operate in a rugged environment, fault tolerance and the effect of this on hardware security will also be deliberated in the course. The talk will also focus on suitable countermeasures to resist such attacks. Finally, as the CPS is made of several heterogeneousdevices, authentication among these devices is of paramount importance. While the resource con- straints in the CPS nodes often renders classical algorithms an overkill, the physical characteristics of the CPS devices give rise to promising primitives called Physically Unclonable Functions (PUFs) which can be leveraged to achieve authentication protocols suited for CPS. The course concludes with a real-life smart-metering example to demonstrate the use of these hardware security primitives in co-ordination.

Training level: Advanced

Course outline

Day 1:
  • Basics
  • Introduction to Cryptography
  • Introduction to Side-Channel Analysis (SCA)
  • Introduction to Cyber Physical Systems (CPS)
  • Exercise
  • AES-128 implementation
  • Simulation of SCA leakage traces
Day 2:
  • Side-Channel Analysis
  • Correlation Power Analysis (CPA)
  • Leakage detection – TVLA and NICV
  • SCA on PKC
  • SCA countermeasures
  • Exercise
  • CPA implementation
  • CPA on simulated traces
  • CPA on real traces
  • Implementing Countermeasures (misalignment) and analysis
Day 3:
  • Fault Analysis
  • Basics of Fault Attack: (FA)
  • Fault injection
  • Differential Fault Analysis (DFA)
  • FA on PKC
  • FA countermeasures
  • Advanced attacks
  • Exercise
  • Implementation of AES rounds
  • Implementation of fault injection functions
Day 4
  • CPS Security with Hardware Root of Trust
  • Physically Unclonable Functions (PUF)
  • Security of PUF
  • CPS security with PUF
  • Smart meter case study
  • Smart grid case study
  • Exercise + Demo
  • Implementation of DFA on AES – CPS Demo
  • CPS Demo

Training Formats

  • Technical seminar & tutorial
  • Hands-on exercise

What to Bring?

  • A computing facility, like laptop etc.

Training prerequisites

  • Previous acquaintance to security and cryptography
  • Basic understanding of programming in Python

Who Should Attend?

  • After having this course, one is expected to be able to perform certain physical attacks on embedded and CPS devices.

The audience should include (but not limited to) :

  • Hardware and software Product designers/tester/manufacturers.
  • Evaluation and certification laboratories
  • Future Security Professional and Engineers
  • Government agencies and research institutes
  • Technologists and Consultants in Current Market Trends

What to Expect?

Exposure to advanced topics on side channels, hardware security primitives, and the context to CPS, including hands-on experiments using python

What attendees will get?

  • Presentation materials would be shared before the training.
  • Attendees will also get access to the attack codes during the training.

What not to expect?

About the Trainer

Debdeep Mukhopadhyay is currently a full Professor at the Department of Computer Science and Engineering, IIT-Kharagpur, India. At IIT Kharagpur he initiated the Secured Embedded Architecture Laboratory (SEAL), with a focus on Embedded Security and Side Channel Attacks ( . Prior to this he worked asAssociate Professor at IIT Kharagpur, visiting scientist at NTU Singapore, a visiting Associate Professor of NYU-Shanghai, Assistant Professor at IIT-Madras, and as visiting researcher at NYU Tandon-School-of-Engineering, USA. He holds a PhD, an MS, and a B. Tech from IIT Kharagpur, India.

Dr.Mukhopadhyay's research interests are Cryptography, Hardware Security, andVLSI. His books include Fault Tolerant Architectures for Cryptography andHardware Security (Springer), Cryptography and Network Security (Mc GrawHills), Hardware Security: Design, Threats, and Safeguards (CRC Press), and Timing Channels in Cryptography (Springer).He has written more than 250 papers in peer-reviewed conferences and journals and has collaborated with several Indian and Foreign Organizations. He has been in the program committee of several top International conferences and is an Associate Editor of the International Association of Cryptologic Research (IACR) Transactions of CHES,IEEE Transactions on Information Forensics and Security (IEEE TIFS), ACM Transactions on Embedded Computing Systems (ACM-TECS), ACM Journal of Emerging Technologies in Computing Systems (ACM JETC), Journal of Hardware and Systems Security, Journal of Cryptographic Engineering, Springer. He has given several invited talks in industry and academia, including tutorial talks at premier conferences like CHES, WIFS, VLSID.

Dr. Mukhopadhyay is the recipient of the prestigious Shanti Swarup Bhatnagar Prize, Swarnajayanti DST Fellowship 2015-16, Data Security Council of India Award for Cyber Security Education, Young Scientist award from the Indian National Science Academy, the Young Engineer award from the Indian National Academy of Engineers, and is a Young Associate of the Indian Academy of Science. He was also awarded the Outstanding Young Faculty fellowship in 2011 from IIT Kharagpur, and the Techno-Inventor Best PhD award by the IndianSemiconductor Association. He has recently incubated a start-up on HardwareSecurity, ESP Pvt Ltd at IIT Kharagpur (

Dr. Shivam Bhasin is a Senior Research Scientist and Programme manager (Cryptographic engineering) at Centre for Hardware Assurance, Temasek laboratories, Nanyang Technical University ([email protected]), Singapore since 2015. His research interests include embedded security, trusted computing and secure designs. He received his PhD from Telecom Paristech in 2011, Master’s from Mines Saint-Etienne, France in 2008. Before NTU, Shivam held position of Research Engineer in Institut Mines-Telecom, France. He was also a visiting researcher at UCL, Belgium (2011) and Kobe University, Japan (2013). Shivam also taught hardware security as an Adjunct Professor in IIT, Kharagpur, India (2018). He regularly publishes at top peer reviewed journals and conferences. Some of his research now also forms a part of ISO/IEC 17825 standard.

Urbi Chatterjee is an Assistant Professor in the department of Computer Science and Engineering, Indian Institute of Technology Kanpur. She completed her Ph. D. under the supervision of Dr. Rajat Subhra Chakraborty and Prof. Debdeep Mukhopadhyay in thedepartment of Computer Science and Engineering, Indian Institute of Technology Kharagpur. Her broad area of research is Hardware Security. She is actively involved in the design of authentication and key exchange protocols based on PUFs, Reliability Analysis of PUFs, Cryptanalysis and Machine Learning Analysis of PUFs.

Sayandeep Saha is a Post-doctoral researcher in the Nanyang Technological University Singapore (NTU-Singapore). He obtained his PhD from the Department of Computer Science and Engineering, Indian Institute of Technology Kharagpur in 2021. He received his MS degree from the same place in 2016. His research interests include implementation-based attacks, automatic security verification against such attacks, and logic locking.

Sayandeep regularly publishes at top peer reviewed conferences and journals such as CHES, EUROCRYPT, DAC, IEEE TIFS etc. He was one of the winners of the Qualcomm Innovation Fellowship 2017.